verilog code for decimal to binary conversion

1 that there is compare(1), compare(2).,compare(n) this will be explained in the next sections. A circuit that compares between two numbers and produces an output accordingly, this circuit is called in this paper the compare circuit. The block diagram is composed mainly of three circuits : 1. The paper is concluded in section THE PROPOSED SYSTEM BLOCK DIAGRAM The complete design is shown in block form in Fig. In section 4 hardware implementation and results are given. In section 3 the systems behavior is shown including its code in Verilog HDL. 1 is explained in detail with its code written in verilog HDL. Design and Implementation of a Generalized N-Digit Binary-To-Decimal Converter on an FPGA Seven-Segment Display Using Verilog Hdl This paper is organized as follows, section 2 shows the block diagram of the system, and then each block in Fig. The complete system is then written in verilog HDL and then downloaded on the programmable device (the FPGA) to implement it. Each block is explained by a truth table and a program code written in verilog HDL that describes its operation. The complete system of this converter is explained in block form shown in Fig.

In this work the idea in is developed to convert an n-bit number to its decimal equivalent. This system is designed using Verilog HDL and then is implemented on an FPGA. 1.2 The Aim Of This Work The aim of this work is to design a system that can display the decimal equivalent of any n-bit number on a seven segment display. In addition has implemented a digital clock being displayed on a seven segment display, it differs with this paper in the objective but has some relevance about being both displayed on a seven segment display.

gives a basic idea of how to display the decimal equivalent of a 4-bit number on a seven segment display, its details are given in appix A at the of this paper. 1.1 Related Work Altera is a corporation that supplies programmable semiconductors, it provides a software tool called Quartus II to reconfigure these programmable devices. The design of a system that can be an interface between those outputs and a seven segment display is necessary, which is the aim of this work. Most of these applications require displaying the decimal equivalent of their outputs on for example a seven segment display. INTRODUCTION In many electronic applications outputs are in form especially circuits designed using Hardware Descriptive Languages. KEYWORDS: to decimal converter, FPGA, Verilog HDL, seven segment display, Cyclone II de1 board. This HDL program is then used to configure an FPGA to implement the designed circuit. In this paper a circuit that can display the decimal equivalent of an n-bit number is designed and it s behavior is described using Verilog Hardware Descriptive Language (HDL). Asma Taha Saadoon University of Baghdad/ Engineering College Computer Engineering Department ABSTRACT It is often needed to have circuits that can display the decimal representation of a number and specifically in this paper on a 7-segment display. 1 Design and Implementation of a Generalized N-Digit Binary-To-Decimal Converter on an FPGA Seven-Segment Display Using Verilog Hdl Asst.

Verilog code for decimal to binary conversion